Analog-to-digital converters of the successive-approximation type generally include a binarily-weighted array of precision resistor or capacitor components. Ideally, in such a binarily-weighted array, each member of the array will have a resistance or capacitance value of exactly one half that of another member of the array. In analog to digital converters having more than 14 bits, it has heretofore been difficult and expensive to achieve the extremely-precise component accuracy required.
One method which has been utilized to provide such an array of components for use in conjunction with an analog-to-digital converter is the laser trimming of nichrome resistors. Regardless, though, of how accurately the binarily-weighted components may initially be fabricated, conversion errors invariably arise due to temperature-induced changes and long-term drift of component values. Consequently, it is desirable that the array of component values be calibrated from time to time. Analog-to-digital converters that can be calibrated subsequent to initial manufacture and without the use of external components are referred to as self-calibrating circuits. To satisfy size, reliability, and economic requirements, it is desirable that such a self-calibrating circuit utilize only components that are suitable for fabrication in a monolithic integrated circuit with presently-existing process technology.
One self-calibrating circuit which has been proposed utilizes an array of MOS capacitors initially manufactured as closely as possible to ideal binarily-weighted values. The proposed circuit can be implemented using standard CMOS or NMOS technology. During calibration, errors in capacitance values are measured and stored in a memory as digital codes. These digital codes are arithmetically manipulated and utilized to generate an analog voltage which is utilized by the digital to analog converter to correct for the known error. The proposed circuit is rather complex and the process of generating an analog voltage and utilizing it to correct for the known error may itself not be free of error.
Accordingly, a need exists for a method for adjusting the values of a plurality of capacitances in a monolithic integrated circuit so that the plurality of capacitances form a highly accurate binarily-weighted sequence of values. It is further desirable that such method be capable of being repeated from time to time in order to continuously calibrate the array of capacitance values.
In another aspect of the invention, it is desirable that a self-calibrating procedure for a binarily-weighted array of capacitances in an analog-to-digital converter be continuously performed and be transparent to the user of the analog-to-digital converter.